Difference between revisions of "Building a PCB"
(add initial sections) |
m (Gram) |
||
(5 intermediate revisions by 2 users not shown) | |||
Line 2: | Line 2: | ||
== Designing with atopile == | == Designing with atopile == | ||
+ | |||
[[atopile]] enables code-defined pcb design. Follow atopile's [https://atopile.io/getting-started/ getting-started] guide to set up your project. | [[atopile]] enables code-defined pcb design. Follow atopile's [https://atopile.io/getting-started/ getting-started] guide to set up your project. | ||
An example atopile PCB project is provided by the K-Scale Labs team [https://github.com/kscalelabs/atopile-pcb-example here] | An example atopile PCB project is provided by the K-Scale Labs team [https://github.com/kscalelabs/atopile-pcb-example here] | ||
− | PCB | + | === Importing into KiCad === |
+ | After completing the atopile setup and building your atopile project, you will need to import the build into [https://www.kicad.org/ KiCad]. | ||
+ | |||
+ | To import your design into KiCad, | ||
+ | |||
+ | # Open <your-project>/elec/layout/default/<your-project-name>.kicad_pro with KiCad. | ||
+ | # Delete all of the pcb board outlines you do not want to have (By default there are 3 available options to choose from) | ||
+ | # Go to File->Import->Netlist... | ||
+ | # In the Import Netlist pop-up, select your .net file to import, typically located at <your-project>/build/default.net | ||
+ | # Click "Load and Test Netlist" | ||
+ | # Click "Update PCB" | ||
+ | # Click "Close" | ||
+ | # Select anywhere on the screen where to place the components (you can move them later) | ||
+ | |||
+ | atopile automatically connects the necessary components together, but you will still have to manually create your preferred layout and draw the connecting traces/routes (KiCad makes this process very simple) | ||
+ | |||
+ | === Connecting Traces === | ||
+ | |||
+ | After positioning your board components, you will have to connect them using the KiCad router tool, seen circled in red below: | ||
+ | [[File:Trace Tool.png|center|thumb|KiCad Trace Tool]] | ||
+ | |||
+ | To use this tool, simply select the router tool icon on the right-hand side of the KiCad program window and select a components pin to begin. | ||
− | |||
− | Exporting | + | The KiCad program will give you a visualization of which components you should trace towards. |
− | + | ||
− | + | ||
− | + | Connect all traces and verify no components have been left unconnected. | |
− | -BoM | + | |
− | -CPL | + | |
+ | === Exporting Files for Manufacturing === | ||
+ | There are multiple files required to get a PCB manufactured. Each manufacturer may have different requirements. | ||
+ | |||
+ | For this example, we will be using [https://jlcpcb.com/ JCLPCB's] PCB manufacturing services. | ||
+ | |||
+ | JCLPCB Requires: | ||
+ | |||
+ | * Gerber Files | ||
+ | * Drill Files | ||
+ | * Map Files | ||
+ | * BoM | ||
+ | * CPL | ||
+ | |||
+ | ==== Exporting Gerber, Drill, and Map Files ==== | ||
+ | |||
+ | For a detailed instruction, follow JLCPCB's KiCad export instructions [https://jlcpcb.com/help/article/362-how-to-generate-gerber-and-drill-files-in-kicad-7 here] | ||
+ | |||
+ | |||
+ | ==== Exporting BoM (Bill of Materials) ==== | ||
+ | |||
+ | atopile will automatically make the BoM for you, although you may need to reformat the header & information to meet the requirements of your manufacturer. | ||
+ | |||
+ | The JLCPCP format can be seen below: | ||
+ | [[File:JLCPCB BOM Format.png|center|500px|thumb|JLCPCB BOM Requirement]] | ||
+ | |||
+ | atopile's BoM file can be found in the build directory, typically called "default.csv" (<your-project>/build/default.net) | ||
+ | |||
+ | ==== Exporting CPL (Component Placement List) ==== | ||
+ | |||
+ | KiCad allows for quick and easy CPL exporting, although you will have to reformat your information to fit your manufacturers requirements | ||
+ | |||
+ | To export a CPL from your KiCad project: | ||
+ | |||
+ | # Go to File -> Fabrication Outputs -> Component Placement | ||
+ | # Select proper output directory | ||
+ | # Use CSV, Millimeters, and Separate files for front, back settings: | ||
+ | |||
+ | [[File:Pos settings.png|center|500px|thumb|Settings for CPL Generation in KiCad]] | ||
+ | |||
+ | # Click "Generate Position File" | ||
+ | # Fix output file to match your manufacturers requirements (JLCPCB example provided) | ||
+ | |||
+ | [[File:JLCPCB CPL.png|center|500px|thumb|JLCPCB CPL Example Format]] | ||
== Ordering a PCB == | == Ordering a PCB == | ||
Line 28: | Line 92: | ||
== Related Articles == | == Related Articles == | ||
− | |||
* [[atopile]] | * [[atopile]] | ||
Latest revision as of 05:45, 30 April 2024
Walk-through and notes regarding how to design and ship a PCB.
Contents
Designing with atopile[edit]
atopile enables code-defined pcb design. Follow atopile's getting-started guide to set up your project.
An example atopile PCB project is provided by the K-Scale Labs team here
Importing into KiCad[edit]
After completing the atopile setup and building your atopile project, you will need to import the build into KiCad.
To import your design into KiCad,
- Open <your-project>/elec/layout/default/<your-project-name>.kicad_pro with KiCad.
- Delete all of the pcb board outlines you do not want to have (By default there are 3 available options to choose from)
- Go to File->Import->Netlist...
- In the Import Netlist pop-up, select your .net file to import, typically located at <your-project>/build/default.net
- Click "Load and Test Netlist"
- Click "Update PCB"
- Click "Close"
- Select anywhere on the screen where to place the components (you can move them later)
atopile automatically connects the necessary components together, but you will still have to manually create your preferred layout and draw the connecting traces/routes (KiCad makes this process very simple)
Connecting Traces[edit]
After positioning your board components, you will have to connect them using the KiCad router tool, seen circled in red below:
To use this tool, simply select the router tool icon on the right-hand side of the KiCad program window and select a components pin to begin.
The KiCad program will give you a visualization of which components you should trace towards.
Connect all traces and verify no components have been left unconnected.
Exporting Files for Manufacturing[edit]
There are multiple files required to get a PCB manufactured. Each manufacturer may have different requirements.
For this example, we will be using JCLPCB's PCB manufacturing services.
JCLPCB Requires:
- Gerber Files
- Drill Files
- Map Files
- BoM
- CPL
Exporting Gerber, Drill, and Map Files[edit]
For a detailed instruction, follow JLCPCB's KiCad export instructions here
Exporting BoM (Bill of Materials)[edit]
atopile will automatically make the BoM for you, although you may need to reformat the header & information to meet the requirements of your manufacturer.
The JLCPCP format can be seen below:
atopile's BoM file can be found in the build directory, typically called "default.csv" (<your-project>/build/default.net)
Exporting CPL (Component Placement List)[edit]
KiCad allows for quick and easy CPL exporting, although you will have to reformat your information to fit your manufacturers requirements
To export a CPL from your KiCad project:
- Go to File -> Fabrication Outputs -> Component Placement
- Select proper output directory
- Use CSV, Millimeters, and Separate files for front, back settings:
- Click "Generate Position File"
- Fix output file to match your manufacturers requirements (JLCPCB example provided)
Ordering a PCB[edit]
Trusted low production PCB manufacturing companies:
- PCBWay
- JLCPCB
- SeeedStudio
Further PCB manufacturers and price comparisons for your specific project can be found here